1. Field of the Invention
The present invention relates to a communication system for a plurality of I/O cards and a method thereof. In particular, this invention relates to a communication system for a plurality of I/O cards by using the GPIO (General Purpose Input/Output) and a method thereof.
2. Description of the Related Art
When two I/O cards (input/output cards) performs a dual-ways communication in a computer system, two communication channels (such as the I2C or the UART ports) are required to ensure the reliability of the dual-ways communication between the two I/O cards. However, the bus resource of the I/O card is wasted. Furthermore, it is difficult to enhance the reliability of the communication channel due to the bus resource is limited.
Reference is made to FIGS. 1A and 1B. FIG. 1A shows a schematic diagram of the communication system for two I/O cards of the prior art. FIG. 1B shows a flow chart of the communication method for two I/O cards of the prior art. In FIG. 1A, the communication system includes a first I/O card 10, a second I/O card 12 and a middle board 14. The first I/O card 10 and the second I/O card 12 perform the signal communication via the middle board 14. Each of the first I/O card 10 and the second I/O card 12 has a first microprocessor unit 100 and a second microprocessor unit 120. Both the first microprocessor unit 100 and the second microprocessor unit 120 have a plurality of function pins. Some of the function pins are the communication channel pins and are used for communicating with external chip. Therefore, in order to enhance the reliability of the communication channels, two communication channels are designed. The first microprocessor unit 100 has a first communication channel 1000 and a second communication channel 1002, and the second microprocessor unit 120 has a third communication channel 1200 and a fourth communication channel 1202.
The first communication channel 1000 and the fourth communication channel 1202 are the inter-integrated circuit (I2C) communication interfaces. The second communication channel 1002 and the third communication channel 1200 are the UART communication interfaces. Alternatively, the first communication channel 1000 and the fourth communication channel 1202 can be the UART communication interfaces, and the second communication channel 1002 and the third communication channel 1200 can be the I2C communication interfaces.
Reference is made to FIGS. 1A and 1B. FIG. 1B shows the flow chart of the communication method for two I/O cards of the prior art. Firstly, the first I/O card 10 and the second I/O card 12 are initialized and linked together (S100). The first communication channel 1000 and the fourth communication channel 1202 are checked to determine whether the first communication channel 1000 and the fourth communication channel 1202 fail or not (S102). If the first communication channel 1000 and the fourth communication channel 1202 fail, the second communication channel 1002 and the third communication channel 1200 are turned on to perform the communication between the first I/O card 10 and the second I/O card 12 (S104). If the first communication channel 1000 and the fourth communication channel 1202 do not fail, the first communication channel 1000 and the fourth communication channel 1202 perform the communication between the first I/O card 10 and the second I/O card 12 (S106).
The two I/O cards are communicated by utilizing the protocol of the first communication channel 1000 and the fourth communication channel 1202 (I2C) and the protocol of the second communication channel 1002 and the third communication channel 1200 (UART). When any one of the signal lines of the first communication channel 1000 and the fourth communication channel 1202 is damaged so that the bus of the first communication channel 1000 and the fourth communication channel 1202 all fail, the second communication channel 1002 and the third communication channel 1200 can be used for replacing the first communication channel 1000 and the fourth communication channel 1202. These two paths, the first communication channel 1000 and the fourth communication channel 1202, and the second communication channel 1002 and the third communication channel 1200, are designed to enhance the reliability and the stability of the communication. However, the quantity of the signal lines of the bus is large so that the bus resource of the processor chip is consumed, and its cost is increased.